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Design of an Ultra Low Power Ternary Content Addressable Memory using Reversible Circuit

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Publication details: IIITDM Kancheepuram Dept of Electronic Systems 2015Description: xiii, 41 pSubject(s):

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Dissertation note: M.Des - Theses

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Holdings
Item type	Current library	Call number	Status	Date due	Barcode	Item holds
Theses and Dissertations	IIITDM Kancheepuram Library Theses and Dissertation	621.3.049.77 DIN (Browse shelf(Opens below))	Available		TD00217

Total holds: 0

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Previous	621.3.037.37 MOU Stability analysis of externally interfered nonlinear discrete-time systems via passivity approach	621.3.038 SHR Design of low cost universal electronic test equipment	621.3.049:004.421 SHA High performance arithmetic circuit design based on Cordic algorithm	621.3.049.77 DIN Design of an Ultra Low Power Ternary Content Addressable Memory using Reversible Circuit	621.3.049.77 VIN Design of integrated circuit analog multiplier	621.3.049.771.16 LIN Ultra thinoxide MOS devices for future ULSI	621.3.049.774 ABH Design of 3-Stage High Frequency CMOS Voltage Controlled Oscillator	Next

M.Des - Theses

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