000 | 00832 a2200157 4500 | ||
---|---|---|---|
005 | 20250630100848.0 | ||
082 | _a621.3 KAV | ||
100 |
_aKavitha S _93785 |
||
245 | _aEnabling in memory computing with energy efficient memory architecture for AI hardware accelerators | ||
260 |
_aChennai _bECE _c2025 |
||
502 | _aAI hardware accelerators | ||
520 | _aThis system level innovation is vital for supporting the high data rates required by modern artificial intelligence hardware accelerators ensuring communication between various components of a computer system. | ||
653 | _aStatic random access memory; in memory computing; arithmetic and logic operations; DNA sequence alignment; cryptography; high speed memory interconnects | ||
700 |
_aKavitha S _eDr. bhupendra S reniwal and Prof. binsu j kailath _93786 |
||
942 | _cTD | ||
999 |
_c5420 _d5415 |